MAX9986A Evaluation Kit
Layout Considerations
The MAX9986A evaluation board can be a guide for your
board layout. Pay close attention to thermal design and
close placement of components to the IC. The
ground. The total 2pF of capacitance is resonated out
at the frequency of interest by bias inductors L1 and
L2. To determine the inductor value use the following
equation:
MAX9986A package exposed paddle (EP) conducts
heat from the device and provides a low-impedance
electrical connection to the ground plane. The EP MUST
f IF =
1
2 π LC
be attached to the PCB ground plane with a low-thermal
and electrical impedance contact. Ideally, this is
achieved by soldering the backside of the package
directly to a top metal ground plane on the PCB.
Alternatively, the EP can be connected to an internal or
bottom-side ground plane using an array of plated vias
directly below the EP. The MAX9986A EV kit uses nine
evenly spaced, 0.016in-diameter, plated through holes
to connect the EP to the lower ground planes.
Depending on the ground-plane spacing, large sur-
face-mount pads in the IF path may need to have the
ground plane relieved under them to reduce parasitic
shunt capacitance. The layout should be such to min-
mize the coupling from L1, L2, and L3.
Modifying the EV Kit
The RF and LO inputs are broadband matched, so
there is no need to modify the circuit for use anywhere
in the 815MHz to 1000MHz RF range (960MHz to
1180MHz LO range).
Retuning for a different IF is as simple as scaling the
values of the IF pullup inductors up or down with fre-
quency. The IF output looks like 200 Ω differential in
parallel with a capacitor. The capacitance is due to the
combination of the IC, PCB, and external IF compo-
nents. The capacitance from the IC is approximately
1pF to ground (0.5pF differential), while that from the
PCB and external components is approximately 1pF to
The IF output is tuned for operation at approximately
200MHz, so a 330nH inductor is used. For lower IF fre-
quency (i.e., larger component values), maintain the
component’s Q value at the cost of larger case size,
unless it is unavoidable.
The DC current of the device can be reduced, but the
performance will be degraded. Reducing the current is
accomplished by increasing the values of R1 and R2.
Resistor R1 sets the current in the IF amplifier, whereas
R2 sets the current in the LO buffer that drives the
mixer core.
Setting R1 to 953 Ω and R2 to 619 Ω results in IF and LO
currents of 130mA and 71mA, respectively. Approxi-
mately 21mA of additional current is used in other
circuits and cannot be reduced. To reduce these adjust-
able currents in half, double the values of R1 and R2.
Doing so would reduce the current to approximately
130mA, but the gain and IP3 would drop approximately
0.3dB and 2.5dB, respectively. Some of the other per-
formance values degrade or improve due to reduced
current.
Since the linearity of the device is a result of the cascaded
performance of the IF amplifier and the mixer, carefully
choose the correct combination of R1 and R2 to pro-
duce the highest IP3 at the lowest desired current.
4
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